39 #if defined(__MK20DX256__) // Teensy 3.1 40 #define ADC_TEENSY_3_1 41 #elif defined(__MK20DX128__) // Teensy 3.0 42 #define ADC_TEENSY_3_0 43 #elif defined(__MKL26Z64__) // Teensy LC 45 #elif defined(__MK64FX512__) // Teensy 3.5 46 #define ADC_TEENSY_3_5 47 #elif defined(__MK66FX1M0__) // Teensy 3.6 48 #define ADC_TEENSY_3_6 50 #error "Board not supported!" 56 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 57 #define ADC_NUM_ADCS (2) 58 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 59 #define ADC_NUM_ADCS (1) 60 #elif defined(ADC_TEENSY_LC) // Teensy LC 61 #define ADC_NUM_ADCS (1) 62 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 63 #define ADC_NUM_ADCS (2) 64 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 65 #define ADC_NUM_ADCS (2) 69 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 70 #define ADC_USE_DMA (1) 71 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 72 #define ADC_USE_DMA (1) 73 #elif defined(ADC_TEENSY_LC) // Teensy LC 74 #define ADC_USE_DMA (1) 75 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 76 #define ADC_USE_DMA (1) 77 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 78 #define ADC_USE_DMA (1) 82 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 83 #define ADC_USE_PGA (1) 84 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 85 #define ADC_USE_PGA (0) 86 #elif defined(ADC_TEENSY_LC) // Teensy LC 87 #define ADC_USE_PGA (0) 88 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 89 #define ADC_USE_PGA (0) 90 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 91 #define ADC_USE_PGA (0) 95 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 96 #define ADC_USE_PDB (1) 97 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 98 #define ADC_USE_PDB (1) 99 #elif defined(ADC_TEENSY_LC) // Teensy LC 100 #define ADC_USE_PDB (0) 101 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 102 #define ADC_USE_PDB (1) 103 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 104 #define ADC_USE_PDB (1) 108 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 109 #define ADC_USE_INTERNAL_VREF (1) 110 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 111 #define ADC_USE_INTERNAL_VREF (1) 112 #elif defined(ADC_TEENSY_LC) // Teensy LC 113 #define ADC_USE_INTERNAL_VREF (0) 114 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 115 #define ADC_USE_INTERNAL_VREF (1) 116 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 117 #define ADC_USE_INTERNAL_VREF (1) 122 enum class ADC_REF_SOURCE : uint8_t {REF_DEFAULT = 0, REF_ALT = 1, REF_NONE = 2};
123 #if defined(ADC_TEENSY_3_0) || defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6) 130 REF_3V3 = ADC_REF_SOURCE::REF_DEFAULT,
131 REF_1V2 = ADC_REF_SOURCE::REF_ALT,
132 REF_EXT = ADC_REF_SOURCE::REF_DEFAULT,
133 NONE = ADC_REF_SOURCE::REF_NONE
135 #elif defined(ADC_TEENSY_LC) 141 REF_3V3 = ADC_REF_SOURCE::REF_ALT,
142 REF_EXT = ADC_REF_SOURCE::REF_DEFAULT,
143 NONE = ADC_REF_SOURCE::REF_NONE
148 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 149 #define ADC_MAX_PIN (43) 150 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 151 #define ADC_MAX_PIN (43) 152 #elif defined(ADC_TEENSY_LC) // Teensy LC 153 #define ADC_MAX_PIN (43) 154 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 155 #define ADC_MAX_PIN (69) 156 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 157 #define ADC_MAX_PIN (67) 162 #if defined(ADC_TEENSY_3_1) // Teensy 3.1 163 #define ADC_DIFF_PAIRS (2) // normal and with PGA 164 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0 165 #define ADC_DIFF_PAIRS (2) 166 #elif defined(ADC_TEENSY_LC) // Teensy LC 167 #define ADC_DIFF_PAIRS (1) 168 #elif defined(ADC_TEENSY_3_5) // Teensy 3.5 169 #define ADC_DIFF_PAIRS (1) 170 #elif defined(ADC_TEENSY_3_6) // Teensy 3.6 171 #define ADC_DIFF_PAIRS (1) 178 #if defined(ADC_TEENSY_LC) 187 #elif defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_0) 197 #elif defined(ADC_TEENSY_3_5) || defined(ADC_TEENSY_3_6) 234 #if F_BUS == 120000000 235 #define ADC_CFG1_7_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 236 #define ADC_CFG1_15MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 237 #define ADC_CFG1_30MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 238 #define ADC_CFG1_60MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // too fast 240 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 241 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_7_5MHZ) 242 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7_5MHZ) 243 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7_5MHZ) 244 #define ADC_CFG1_HI_SPEED (ADC_CFG1_15MHZ) 245 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_15MHZ) 246 #elif F_BUS == 108000000 247 #define ADC_CFG1_6_75MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 248 #define ADC_CFG1_13_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 249 #define ADC_CFG1_27MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 250 #define ADC_CFG1_54MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // too fast 252 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 253 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_6_75MHZ) 254 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6_75MHZ) 255 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_6_75MHZ) 256 #define ADC_CFG1_HI_SPEED (ADC_CFG1_13_5MHZ) 257 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_27MHZ) 258 #elif F_BUS == 60000000 259 #define ADC_CFG1_3_75MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 260 #define ADC_CFG1_7_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 261 #define ADC_CFG1_15MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 263 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 264 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_75MHZ) 265 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7_5MHZ) 266 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7_5MHZ) 267 #define ADC_CFG1_HI_SPEED (ADC_CFG1_15MHZ) 268 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED 270 #elif F_BUS == 56000000 || F_BUS == 54000000 // frequency numbers are good for 56 MHz and slightly smaller for 54 MHz 271 #define ADC_CFG1_3_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 272 #define ADC_CFG1_7MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 273 #define ADC_CFG1_14MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 274 #define ADC_CFG1_28MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // too fast 276 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 277 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_5MHZ) 278 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7MHZ) 279 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7MHZ) 280 #define ADC_CFG1_HI_SPEED (ADC_CFG1_14MHZ) 281 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_28MHZ) 283 #elif F_BUS == 48000000 284 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2 285 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) // Clock divide select: 2=div4 + Input clock: 1=bus/2 286 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) // Clock divide select: 1=div2 Input clock: 1=bus/2 287 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // this is way too fast, so accuracy is not guaranteed, except for T3.6 289 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 290 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ) 291 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ) 292 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ) 293 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ) 294 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ) 296 #elif F_BUS == 40000000 297 #define ADC_CFG1_2_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 298 #define ADC_CFG1_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 299 #define ADC_CFG1_10MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 300 #define ADC_CFG1_20MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // too fast, except for T3.5 302 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED 303 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2_5MHZ) 304 #define ADC_CFG1_MED_SPEED (ADC_CFG1_5MHZ) 305 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_10MHZ) 306 #define ADC_CFG1_HI_SPEED (ADC_CFG1_10MHZ) 307 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_20MHZ) 309 #elif F_BUS == 36000000 310 #define ADC_CFG1_2_25MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) 311 #define ADC_CFG1_4_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) 312 #define ADC_CFG1_9MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) 313 #define ADC_CFG1_18MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) 315 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_2_25MHZ) 316 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_4_5MHZ) 317 #define ADC_CFG1_MED_SPEED (ADC_CFG1_9MHZ) 318 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_9MHZ) 319 #define ADC_CFG1_HI_SPEED (ADC_CFG1_18MHZ) 320 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED 322 #elif F_BUS == 24000000 323 #define ADC_CFG1_1_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2 324 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(0)) // Clock divide select: 3=div8 + Input clock: 0=bus 325 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0)) // Clock divide select: 2=div4 + Input clock: 0=bus 326 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0)) // Clock divide select: 1=div2 + Input clock: 0=bus 327 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0)) // too fast, except for T3.5 329 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1_5MHZ) 330 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ) 331 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ) 332 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ) 333 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ) 334 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ) 336 #elif F_BUS == 4000000 337 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0)) 338 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0)) 339 #define ADC_CFG1_4MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0)) 341 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ) 342 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ) 343 #define ADC_CFG1_MED_SPEED (ADC_CFG1_4MHZ) 344 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_4MHZ) 345 #define ADC_CFG1_HI_SPEED (ADC_CFG1_4MHZ) 346 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED 348 #elif F_BUS == 2000000 349 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0)) 350 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0)) 352 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ) 353 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ) 354 #define ADC_CFG1_MED_SPEED (ADC_CFG1_2MHZ) 355 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_2MHZ) 356 #define ADC_CFG1_HI_SPEED (ADC_CFG1_2MHZ) 357 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED 360 #error "F_BUS must be 108, 60, 56, 54, 48, 40, 36, 24, 4 or 2 MHz" 399 #define ADC_SC1A_CHANNELS (0x1F) 401 #define ADC_SC1A_PIN_INVALID (0x1F) 403 #define ADC_SC1A_PIN_MUX (0x80) 405 #define ADC_SC1A_PIN_DIFF (0x40) 407 #define ADC_SC1A_PIN_PGA (0x80) 411 #define ADC_ERROR_DIFF_VALUE (-70000) 412 #define ADC_ERROR_VALUE ADC_ERROR_DIFF_VALUE 434 return static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) | static_cast<uint16_t>(rhs));
438 return static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) & static_cast<uint16_t>(rhs));
442 return lhs =
static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) | static_cast<uint16_t>(rhs));
446 return lhs =
static_cast<ADC_ERROR> (
static_cast<uint16_t
>(lhs) & static_cast<uint16_t>(rhs));
454 #define ADC_CFG1_ADIV_MASK_1 (1<<6) 455 #define ADC_CFG1_ADIV_MASK_0 (1<<5) 457 #define ADC_CFG1_MODE_MASK_1 (1<<3) 458 #define ADC_CFG1_MODE_MASK_0 (1<<2) 460 #define ADC_CFG1_ADICLK_MASK_1 (1<<1) 461 #define ADC_CFG1_ADICLK_MASK_0 (1<<0) 463 #define ADC_CFG2_ADLSTS_MASK_1 (1<<1) 464 #define ADC_CFG2_ADLSTS_MASK_0 (1<<0) 466 #define ADC_SC2_REFSEL_MASK_0 (1<<0) 468 #define ADC_SC3_AVGS_MASK_1 (1<<1) 469 #define ADC_SC3_AVGS_MASK_0 (1<<0) 494 ADC_Module(uint8_t ADC_number,
const uint8_t*
const a_channel2sc1a,
const ADC_NLIST*
const a_diff_table);
531 void setResolution(uint8_t bits);
537 uint8_t getResolution();
543 uint32_t getMaxValue();
586 void setAveraging(uint8_t num);
593 void enableInterrupts();
596 void disableInterrupts();
617 void enableCompare(int16_t compValue,
bool greaterThan);
630 void enableCompareRange(int16_t lowerLimit, int16_t upperLimit,
bool insideRange,
bool inclusive);
633 void disableCompare();
641 void enablePGA(uint8_t gain);
655 atomic::setBitFlag(ADC_SC3, ADC_SC3_ADCO);
659 atomic::clearBitFlag(ADC_SC3, ADC_SC3_ADCO);
664 atomic::clearBitFlag(ADC_SC1A, ADC_SC1_DIFF);
668 atomic::setBitFlag(ADC_SC1A, ADC_SC1_DIFF);
673 atomic::clearBitFlag(ADC_SC2, ADC_SC2_ADTRG);
678 atomic::setBitFlag(ADC_SC2, ADC_SC2_ADTRG);
690 return atomic::getBitFlag(ADC_SC2, ADC_SC2_ADACT);
702 return atomic::getBitFlag(ADC_SC1A, ADC_SC1_COCO);
712 return atomic::getBitFlag(ADC_SC1A, ADC_SC1_DIFF);
721 return atomic::getBitFlag(ADC_SC3, ADC_SC3_ADCO);
730 return atomic::getBitFlag(ADC_PGA, ADC_PGA_PGAEN);
741 bool checkPin(uint8_t pin);
749 bool checkDifferentialPins(uint8_t pinP, uint8_t pinN);
759 void startReadFast(uint8_t pin);
767 void startDifferentialFast(uint8_t pinP, uint8_t pinN);
779 int analogRead(uint8_t pin);
793 return analogRead(static_cast<uint8_t>(pin));
805 int analogReadDifferential(uint8_t pinP, uint8_t pinN);
816 bool startSingleRead(uint8_t pin);
825 bool startSingleDifferential(uint8_t pinP, uint8_t pinN);
832 return analogReadContinuous();
843 bool startContinuous(uint8_t pin);
851 bool startContinuousDifferential(uint8_t pinP, uint8_t pinN);
860 return (int16_t)(int32_t)ADC_RA;
864 void stopContinuous();
872 #define ADC_PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \ 873 | PDB_SC_CONT | PDB_SC_LDMOD(0)) 876 #define PDB_CHnC1_TOS_1 0x0100 877 #define PDB_CHnC1_EN_1 0x01 884 void startPDB(uint32_t freq);
890 uint32_t getPDBFrequency();
900 uint32_t
savedSC1A, savedSC2, savedSC3, savedCFG1, savedCFG2;
909 config->savedCFG1 = ADC_CFG1;
910 config->savedCFG2 = ADC_CFG2;
911 config->savedSC2 = ADC_SC2;
912 config->savedSC3 = ADC_SC3;
917 ADC_CFG1 = config->savedCFG1;
918 ADC_CFG2 = config->savedCFG2;
919 ADC_SC2 = config->savedSC2;
920 ADC_SC3 = config->savedSC3;
937 Serial.print(
"ADC"); Serial.print(ADC_num);
938 Serial.print(
" error: ");
941 Serial.print(
"Calibration");
944 Serial.print(
"Wrong pin");
947 Serial.print(
"Analog read");
950 Serial.print(
"Comparison");
953 Serial.print(
"Analog differential read");
956 Serial.print(
"Continuous read");
959 Serial.print(
"Continuous differential read");
962 Serial.print(
"Wrong ADC");
965 Serial.print(
"Synchronous");
970 Serial.print(
"Unknown");
973 Serial.println(
" error.");
997 uint8_t analog_res_bits;
1000 uint32_t analog_max_val;
1003 uint8_t analog_num_average;
1006 ADC_REF_SOURCE analog_reference_internal;
1018 const uint8_t*
const channel2sc1a;
1025 uint8_t getDifferentialPair(uint8_t pin) {
1026 for(uint8_t i=0; i<ADC_DIFF_PAIRS; i++) {
1027 if(diff_table[i].pin == pin) {
1028 return diff_table[i].sc1a;
1031 return ADC_SC1A_PIN_INVALID;
1039 typedef volatile uint32_t& reg;
1080 const uint8_t IRQ_ADC;
1089 #endif // ADC_MODULE_H volatile bool isContinuous()
Is the ADC in continuous mode?
Definition: ADC_Module.h:719
int readSingle()
Reads the analog value of a single conversion.
Definition: ADC_Module.h:831
Dictionary with the differential pins as keys and the SC1A number as values.
Definition: ADC_Module.h:483
void setHardwareTrigger()
Use hardware to trigger the ADC.
Definition: ADC_Module.h:677
ADC_ERROR operator|=(volatile ADC_ERROR &lhs, ADC_ERROR rhs)
|= operator for ADC_ERRORs, it changes the left hand side ADC_ERROR.
Definition: ADC_Module.h:441
uint8_t num_measurements
Number of measurements that the ADC is performing.
Definition: ADC_Module.h:926
uint8_t pin
Pin and corresponding SC1A value.
Definition: ADC_Module.h:485
ADC_SAMPLING_SPEED
Definition: ADC_Module.h:387
uint32_t savedSC1A
ADC registers.
Definition: ADC_Module.h:900
volatile bool isConverting()
Is the ADC converting at the moment?
Definition: ADC_Module.h:688
Definition: ADC_Module.h:476
volatile ADC_ERROR fail_flag
This flag indicates that some kind of error took place.
Definition: ADC_Module.h:932
ADC_ERROR
ADC errors.
Definition: ADC_Module.h:418
volatile bool isPGAEnabled()
Is the PGA function enabled?
Definition: ADC_Module.h:729
ADC_INTERNAL_SOURCE
Definition: ADC_Module.h:190
void resetError()
Resets all errors from the ADC, if any.
Definition: ADC_Module.h:978
void singleMode()
Set single-shot conversion mode.
Definition: ADC_Module.h:658
int analogRead(ADC_INTERNAL_SOURCE pin)
Returns the analog value of the special internal source, such as the temperature sensor.
Definition: ADC_Module.h:792
void continuousMode()
Set continuous conversion mode.
Definition: ADC_Module.h:654
ADC_CONVERSION_SPEED
Definition: ADC_Module.h:370
void differentialMode()
Set differential conversion mode.
Definition: ADC_Module.h:667
constexpr ADC_ERROR operator|(ADC_ERROR lhs, ADC_ERROR rhs)
OR operator for ADC_ERRORs.
Definition: ADC_Module.h:433
volatile bool isComplete()
Is an ADC conversion ready?
Definition: ADC_Module.h:700
const uint8_t ADC_num
Which adc is this?
Definition: ADC_Module.h:984
void setSoftwareTrigger()
Use software to trigger the ADC, this is the most common setting.
Definition: ADC_Module.h:672
Store the config of the adc.
Definition: ADC_Module.h:898
void saveConfig(ADC_Config *config)
Save config of the ADC to the ADC_Config struct.
Definition: ADC_Module.h:907
void singleEndedMode()
Set single-ended conversion mode.
Definition: ADC_Module.h:663
volatile bool isDifferential()
Is the ADC in differential mode?
Definition: ADC_Module.h:710
ADC_ERROR operator&=(volatile ADC_ERROR &lhs, ADC_ERROR rhs)
&= operator for ADC_ERRORs, it changes the left hand side ADC_ERROR.
Definition: ADC_Module.h:445
uint8_t adcWasInUse
Was the adc in use before a call?
Definition: ADC_Module.h:904
ADC_REFERENCE
Definition: ADC_Module.h:129
void loadConfig(const ADC_Config *config)
Load config to the ADC.
Definition: ADC_Module.h:916
constexpr ADC_ERROR operator&(ADC_ERROR lhs, ADC_ERROR rhs)
AND operator for ADC_ERRORs.
Definition: ADC_Module.h:437
int analogReadContinuous()
Reads the analog value of a continuous conversion.
Definition: ADC_Module.h:859
void printError()
Prints the human-readable error, if any.
Definition: ADC_Module.h:935